The invention uses various materials which are electrically either conductive, insulating or semiconducting, although the completed semiconductor circuit device itself is usually referred to as a "semiconductor". One of the materials used is silicon, which is used as either single crystal silicon or as polycrystalline silicon material, referred to as polysilicon or "poly" in this disclosure.
An efficient design technique to reduce SEU (single event upset) in static random access memory (SRAM) is to include two cross-coupled resistors in the memory cell. These two resistors introduce a sufficient response delay in the cross-coupled latch structure so that the affected storage node has enough time to recover from a foreign particle impact before that particle's charge can cause the latch to "lose" its data integrity. Refer to FIGS. 1 for a schematic of the six transistors and two resistors in the SRAM cell.
Historically, these cross-coupled resistors were fabricated out of a second layer of polysilicon while the six transistors were made with the first layer of polysilicon. While this approach is manufacturable, it does have several disadvantages. This is the result of the extra polysilicon layer adding considerable processing complexity. Furthermore, the second polysilicon layer significantly adds to the vertical topology, resulting in a more severe step coverage problem for the metallization process step.